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@bvrockwell bvrockwell commented Jul 18, 2025

Creating a place in the docs for TPU optimization tips, WIP

@bvrockwell bvrockwell requested a review from hmellor as a code owner July 18, 2025 00:52
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@mergify mergify bot added documentation Improvements or additions to documentation tpu Related to Google TPUs labels Jul 18, 2025
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Code Review

This pull request adds a new documentation page with optimization tips for using vLLM on TPUs. The content is valuable and well-structured. I've identified a few issues, mainly related to broken or fragile links and a missing image, which could impact the user experience. I've also found a typo in a command-line argument that could cause issues for users who copy-paste it. Please see my detailed comments.

@bvrockwell bvrockwell marked this pull request as draft July 18, 2025 00:53
bvrockwell and others added 11 commits July 17, 2025 17:56
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
@bvrockwell bvrockwell marked this pull request as ready for review July 23, 2025 19:34
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@Chenyaaang @yaochengji ptal


### **Optimize based on your data**

#### *max model len vs. most model len*
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why is this included in "reducing compilation time" section? because using max model len increases compilation time.

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Thanks for the awesome documentation! Left a few comments!


#### Latency-throughput tradeoff

As with rightsizing the number of chips for your workload, consider adjusting `--max-num-seqs` to fine-tune the latency-throughput balance. Decreasing `--max-num-seqs` in increments of 128 and/or increasing the number of chips can help reduce latency.
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I don't think max-num-seqs needs to be decreased by 128 each time.


This approach serves as a general rule of thumb.

#### Latency-throughput tradeoff
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Another tradeoff consideration is max-num-batch-tokens, e.g. usually max-num-batch-tokens=512 has better latency but poorer throughput compared with max-num-batch-tokens=1024


Although the first compilation can take some time, for all subsequent server launches, vLLM can load these graphs directly from the cache, eliminating the compilation time for future runs.

Use `VLLM_XLA_CACHE_PATH` environment variable to write to shareable storage for future launches.
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Do we need to mention that there's actually a issue in persistent compilation cache?


If most of your requests are shorter than the maximum model length but you still need to accommodate occasional longer requests, setting a high maximum model length can negatively impact performance. In these cases, you can try introducing most model len by specifying the `VLLM_TPU_MOST_MODEL_LEN` environment variable.

For example, 1% requests are 32k length and 99% requests are 2k length. You can pass 32k into `--max-model-len 32000` and use `VLLM_TPU_MOST_MODEL_LEN=2000`.
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In this example, we'd better change max-model-len to 32768, and VLLM_TPU_MOST_MODEL_LEN to 2048.

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Thanks for the docs contribution!

I have some general style comments initially:

  • Please fix the pre-commit and DCO checks
  • Please avoid using bold text in the headings
  • Some of the headings are quite long might not render how it was intended
    image
  • In the navigation bar this page is nested in a TPU directory and you only see the title of the page if you try and look inside it
    image

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Why docs/configuration/tpu/README.md instead of docs/configuration/tpu.md

#### **SPMD**
More details to come.

#### Want us to cover something that isn't listed here? Open up an issue please and cite this doc. We'd love to hear your questions or tips.
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This should't be a heading, the whole thing appears in the ToC


### **Get started**

Looking for setup and installation instructions? Find them [here](https://docs.vllm.ai/en/latest/getting_started/installation/google_tpu.html).
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Please use relative md links for internal docs references (http links will break in future releaes)


#### **Profiling**

The auto-tuner provides a profile of optimized configurations as its final step. However, interpreting this profile can be challenging for new users. We plan to expand this section in the future with more detailed guidance. In the meantime, you can learn how to collect a TPU profile using vLLM's native profiling tools [here](https://docs.vllm.ai/en/latest/examples/offline_inference/profiling_tpu.html). This profile can provide valuable insights into your workload's performance.
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Please use relative md links for internal docs references (http links will break in future releaes)

Comment on lines +74 to +79
### **If possible, use the precision that matches the chip’s hardware acceleration**

- v5e has int4/int8 hardware acceleration in the MXU
- v6e has int4/int8 hardware acceleration in the MXU

### **Don't set TP to be less than the number of chips on a single-host deployment**
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These headings are also quite long

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